Sr. Physical Design Engineer, Amazon Leo
Amazon • Austin, Texas, United States • San Diego, California, United States
No Relocation
Posted: August 28, 2026
Additional Content
Description
- Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world.Be
Description
- Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Be part of Amazon Leo’s sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways. This is a unique opportunity to define a groundbreaking wireless solution with few legacy constraints. The team works with customer requirements and wireless system teams to define modems, high-speed interfaces, embedded processors, and DSP solutions in latest CMOS generation technologies. Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Key job responsibilities • Work with RTL/logic designers to drive architectural feasibility studies, explore power-performance-area tradeoffs for physical design closure • Drive IO/Core block physical implementation through synthesis, floor planning, bus / pin planning, place and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, ECO and sign-off • Develop physical design methodologies while embracing AI flow • Evaluate 3rd party IP and provide recommendations • Be a highly-valued member of our start-up like team through excellent collaboration and teamwork with other physical design engineers as well as with the RTL/Arch. Teams
Basic Qualifications
- - Bachelor's degree in Electrical Engineering or a related field - 7+ years of experience in ASIC implementation, i.e., synthesis, STA and working with DFT, P&R for deep sub-micron nodes.